1/*******************************************************************************
2* Copyright 2022 Intel Corporation
3*
4* Licensed under the Apache License, Version 2.0 (the "License");
5* you may not use this file except in compliance with the License.
6* You may obtain a copy of the License at
7*
8* http://www.apache.org/licenses/LICENSE-2.0
9*
10* Unless required by applicable law or agreed to in writing, software
11* distributed under the License is distributed on an "AS IS" BASIS,
12* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13* See the License for the specific language governing permissions and
14* limitations under the License.
15*******************************************************************************/
16
17#ifndef GPU_JIT_PASS_PASS_HPP
18#define GPU_JIT_PASS_PASS_HPP
19
20#include "gpu/jit/ir/ir.hpp"
21#include "gpu/jit/pass/alloc.hpp"
22#include "gpu/jit/pass/bank_conflict.hpp"
23#include "gpu/jit/pass/barrier.hpp"
24#include "gpu/jit/pass/cse.hpp"
25#include "gpu/jit/pass/dp4a.hpp"
26#include "gpu/jit/pass/dpas_atomic.hpp"
27#include "gpu/jit/pass/dpasw.hpp"
28#include "gpu/jit/pass/expr_scalarizer.hpp"
29#include "gpu/jit/pass/hoist.hpp"
30#include "gpu/jit/pass/overflow.hpp"
31#include "gpu/jit/pass/peephole.hpp"
32#include "gpu/jit/pass/send.hpp"
33#include "gpu/jit/pass/shuffle_splitter.hpp"
34#include "gpu/jit/pass/simplify.hpp"
35#include "gpu/jit/pass/slm.hpp"
36#include "gpu/jit/pass/strength_reduce.hpp"
37#include "gpu/jit/pass/unroll.hpp"
38
39namespace dnnl {
40namespace impl {
41namespace gpu {
42namespace jit {
43
44stmt_t inject_external_var_let(const stmt_t &_stmt, ir_context_t &ir_ctx);
45
46// Removes redundant u16 casts inside send masks which may appear after
47// previous mask hoisting.
48stmt_t remove_spurious_send_mask_cast(const stmt_t &s, ir_context_t &ir_ctx);
49
50// Splits wide GRF stores otherwise unsupported in HW.
51stmt_t split_wide_stores(const stmt_t &s, ir_context_t &ir_ctx);
52
53// Injects broadcasts for scalar if conditions. Example:
54// Before:
55// if (cond) { ... }
56// After (for SIMD8):
57// if (bcast8(cond)) { ... }
58stmt_t fixup_if_conditions(const stmt_t &s, ir_context_t &ir_ctx);
59
60// Remove prefetches is they exceed available registers
61stmt_t maybe_strip_prefetches(
62 const stmt_t &s, ir_context_t &ir_ctx, int reserved_regs);
63
64} // namespace jit
65} // namespace gpu
66} // namespace impl
67} // namespace dnnl
68
69#endif
70