1 | /******************************************************************************* |
2 | * Copyright 2022 Intel Corporation |
3 | * |
4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
5 | * you may not use this file except in compliance with the License. |
6 | * You may obtain a copy of the License at |
7 | * |
8 | * http://www.apache.org/licenses/LICENSE-2.0 |
9 | * |
10 | * Unless required by applicable law or agreed to in writing, software |
11 | * distributed under the License is distributed on an "AS IS" BASIS, |
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
13 | * See the License for the specific language governing permissions and |
14 | * limitations under the License. |
15 | *******************************************************************************/ |
16 | |
17 | #ifndef GPU_JIT_PASS_SLM_HPP |
18 | #define GPU_JIT_PASS_SLM_HPP |
19 | |
20 | #include "gpu/jit/ir/ir.hpp" |
21 | #include "gpu/jit/ir/tensor.hpp" |
22 | |
23 | namespace dnnl { |
24 | namespace impl { |
25 | namespace gpu { |
26 | namespace jit { |
27 | |
28 | // Merges all SLM buffers into a single one. |
29 | stmt_t merge_slm_buffers(const stmt_t &_stmt, ir_context_t &ir_ctx); |
30 | |
31 | // Replaces some heavy GRF reorders by reorder through SLM (store and load). |
32 | stmt_t inject_slm_reorder(const stmt_t &s, ir_context_t &ir_ctx, |
33 | const grid_info_t &tg_grid, bool has_slm_usage); |
34 | |
35 | } // namespace jit |
36 | } // namespace gpu |
37 | } // namespace impl |
38 | } // namespace dnnl |
39 | |
40 | #endif |
41 | |