1 | /******************************************************************************* |
2 | * Copyright 2020-2022 Intel Corporation |
3 | * Copyright 2022 FUJITSU LIMITED |
4 | * |
5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | * you may not use this file except in compliance with the License. |
7 | * You may obtain a copy of the License at |
8 | * |
9 | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | * |
11 | * Unless required by applicable law or agreed to in writing, software |
12 | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | * See the License for the specific language governing permissions and |
15 | * limitations under the License. |
16 | *******************************************************************************/ |
17 | |
18 | #include "cpu/reorder/cpu_reorder.hpp" |
19 | |
20 | namespace dnnl { |
21 | namespace impl { |
22 | namespace cpu { |
23 | |
24 | // clang-format off |
25 | |
26 | const impl_list_map_t ®ular_u8_impl_list_map() { |
27 | static const impl_list_map_t the_map = REG_REORDER_P({ |
28 | // u8 -> |
29 | {{u8, data_type::undef, 0}, { |
30 | REG_FAST_DIRECT_COPY(u8, f32) |
31 | REG_FAST_DIRECT_COPY(u8, s32) |
32 | REG_FAST_DIRECT_COPY(u8, bf16) |
33 | REG_FAST_DIRECT_COPY(u8, s8) |
34 | REG_FAST_DIRECT_COPY(u8, u8) |
35 | |
36 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
37 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
38 | |
39 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
40 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
41 | |
42 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(u8, any, f32, nChw16c)) |
43 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(u8, any, s32, nChw16c)) |
44 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(u8, any, bf16, nChw16c)) |
45 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(u8, any, s8, nChw16c)) |
46 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(u8, any, u8, nChw16c)) |
47 | |
48 | REG_SR(u8, any, f32, any, fmt_order::any, spec::reference) |
49 | REG_SR(u8, any, s32, any, fmt_order::any, spec::reference) |
50 | REG_SR(u8, any, bf16, any, fmt_order::any, spec::reference) |
51 | REG_SR(u8, any, u8, any, fmt_order::any, spec::reference) |
52 | REG_SR(u8, any, s8, any, fmt_order::any, spec::reference) |
53 | |
54 | nullptr, |
55 | }}, |
56 | }); |
57 | return the_map; |
58 | } |
59 | |
60 | // clang-format on |
61 | |
62 | } // namespace cpu |
63 | } // namespace impl |
64 | } // namespace dnnl |
65 | |