1 | /******************************************************************************* |
2 | * Copyright 2020-2022 Intel Corporation |
3 | * Copyright 2022 FUJITSU LIMITED |
4 | * |
5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | * you may not use this file except in compliance with the License. |
7 | * You may obtain a copy of the License at |
8 | * |
9 | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | * |
11 | * Unless required by applicable law or agreed to in writing, software |
12 | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | * See the License for the specific language governing permissions and |
15 | * limitations under the License. |
16 | *******************************************************************************/ |
17 | |
18 | #include "cpu/reorder/cpu_reorder.hpp" |
19 | |
20 | namespace dnnl { |
21 | namespace impl { |
22 | namespace cpu { |
23 | |
24 | // clang-format off |
25 | |
26 | const impl_list_map_t ®ular_f32_f32_impl_list_map() { |
27 | static const impl_list_map_t the_map = REG_REORDER_P({ |
28 | // f32 -> f32 |
29 | {{f32, f32, 0}, { |
30 | REG_FAST_DIRECT_COPY_F32_F32 |
31 | |
32 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::brgemm_matmul_matrix_B_reorder_t)) |
33 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
34 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
35 | |
36 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
37 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
38 | REG_SR(f32, any, f32, any, fmt_order::any, spec::reference) |
39 | |
40 | nullptr, |
41 | }}, |
42 | {{f32, f32, 3}, { |
43 | REG_FAST_DIRECT_COPY_F32_F32 |
44 | |
45 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::brgemm_matmul_matrix_B_reorder_t)) |
46 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
47 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
48 | |
49 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
50 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
51 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCw16c)) |
52 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCw8c)) |
53 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCw4c)) |
54 | |
55 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nCw4c, f32, nCw16c)) |
56 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nCw8c, f32, nCw16c)) |
57 | |
58 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw4i4o)) |
59 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw4o4i)) |
60 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw8i8o)) |
61 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw8o8i)) |
62 | |
63 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw16o16i)) |
64 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIw16i16o)) |
65 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, IOw16o16i)) |
66 | |
67 | REG_SR(f32, any, f32, any, fmt_order::any, spec::reference) |
68 | |
69 | nullptr, |
70 | }}, |
71 | {{f32, f32, 4}, { |
72 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::wino_reorder_t<f32, f32>)) |
73 | |
74 | CPU_REORDER_INSTANCE(rnn_weights_reorder_t<f32, f32>) |
75 | |
76 | REG_FAST_DIRECT_COPY_F32_F32 |
77 | |
78 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
79 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
80 | |
81 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
82 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
83 | |
84 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nChw16c)) |
85 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nChw8c)) |
86 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nChw4c)) |
87 | |
88 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nChw4c, f32, nChw16c)) |
89 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nChw8c, f32, nChw16c)) |
90 | |
91 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw4i4o)) |
92 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw4o4i)) |
93 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw8i8o)) |
94 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw8o8i)) |
95 | |
96 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw16o16i)) |
97 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIw16i16o)) |
98 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gIOw16o16i)) |
99 | |
100 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw4i4o)) |
101 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw4o4i)) |
102 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Ohwi8o)) |
103 | |
104 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw8i8o)) |
105 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw8o8i)) |
106 | |
107 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Oihw4o)) |
108 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Oihw16o)) |
109 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Ohwi4o)) |
110 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Ohwi16o)) |
111 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw16o16i)) |
112 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw16i16o)) |
113 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, IOhw16o16i)) |
114 | |
115 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIhw4i16o4i)) |
116 | |
117 | REG_SR(f32, any, f32, any, fmt_order::any, spec::reference) |
118 | |
119 | nullptr, |
120 | }}, |
121 | {{f32, f32, 5}, { |
122 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::wino_reorder_t<f32, f32>)) |
123 | CPU_REORDER_INSTANCE(rnn_weights_reorder_t<f32, f32>) |
124 | |
125 | REG_FAST_DIRECT_COPY_F32_F32 |
126 | |
127 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
128 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
129 | |
130 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
131 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
132 | |
133 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCdhw16c)) |
134 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCdhw8c)) |
135 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, nCdhw4c)) |
136 | |
137 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nCdhw4c, f32, nCdhw16c)) |
138 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, nCdhw8c, f32, nCdhw16c)) |
139 | |
140 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw4i4o)) |
141 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw4o4i)) |
142 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOhwi8o)) |
143 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw8i8o)) |
144 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw8o8i)) |
145 | |
146 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOihw4o)) |
147 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOihw16o)) |
148 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOhwi4o)) |
149 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOhwi16o)) |
150 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw16o16i)) |
151 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw16i16o)) |
152 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gIOhw16o16i)) |
153 | |
154 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw4i4o)) |
155 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw4o4i)) |
156 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Odhwi8o)) |
157 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw8i8o)) |
158 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw8o8i)) |
159 | |
160 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Oidhw4o)) |
161 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Oidhw16o)) |
162 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, Odhwi16o)) |
163 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw16o16i)) |
164 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, OIdhw16i16o)) |
165 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, IOdhw16o16i)) |
166 | |
167 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIhw4i16o4i)) |
168 | |
169 | REG_SR(f32, any, f32, any, fmt_order::any, spec::reference) |
170 | |
171 | nullptr, |
172 | }}, |
173 | {{f32, f32, 6}, { |
174 | REG_FAST_DIRECT_COPY_F32_F32 |
175 | |
176 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
177 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
178 | |
179 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_blk_reorder_t)) |
180 | DNNL_AARCH64_ONLY(CPU_REORDER_INSTANCE(aarch64::jit_uni_reorder_t)) |
181 | |
182 | |
183 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw4i4o)) |
184 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw4o4i)) |
185 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOdhwi8o)) |
186 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw8i8o)) |
187 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw8o8i)) |
188 | |
189 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOidhw4o)) |
190 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOidhw16o)) |
191 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOdhwi16o)) |
192 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw16o16i)) |
193 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gOIdhw16i16o)) |
194 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, f32, gIOdhw16o16i)) |
195 | |
196 | REG_SR(f32, any, f32, any, fmt_order::any, spec::reference) |
197 | |
198 | nullptr, |
199 | }}, |
200 | }); |
201 | return the_map; |
202 | } |
203 | |
204 | // clang-format on |
205 | |
206 | } // namespace cpu |
207 | } // namespace impl |
208 | } // namespace dnnl |
209 | |