1 | /******************************************************************************* |
2 | * Copyright 2020-2022 Intel Corporation |
3 | * |
4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
5 | * you may not use this file except in compliance with the License. |
6 | * You may obtain a copy of the License at |
7 | * |
8 | * http://www.apache.org/licenses/LICENSE-2.0 |
9 | * |
10 | * Unless required by applicable law or agreed to in writing, software |
11 | * distributed under the License is distributed on an "AS IS" BASIS, |
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
13 | * See the License for the specific language governing permissions and |
14 | * limitations under the License. |
15 | *******************************************************************************/ |
16 | |
17 | #include "cpu/reorder/cpu_reorder.hpp" |
18 | |
19 | namespace dnnl { |
20 | namespace impl { |
21 | namespace cpu { |
22 | |
23 | // clang-format off |
24 | |
25 | const impl_list_map_t ®ular_f32_bf16_impl_list_map() { |
26 | static const impl_list_map_t the_map = REG_REORDER_P({ |
27 | // f32 -> bf16 |
28 | {{f32, bf16, 0}, { |
29 | CPU_REORDER_INSTANCE(rnn_weights_reorder_t<f32, bf16>) |
30 | |
31 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_blk_reorder_t)) |
32 | DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t)) |
33 | |
34 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, bf16, nChw16c)) |
35 | DNNL_NON_X64_ONLY(REG_SR_BIDIR(f32, any, bf16, nCdhw16c)) |
36 | |
37 | DNNL_NON_X64_ONLY(REG_SR(f32, oihw, bf16, OIhw8i16o2i, fmt_order::keep)) |
38 | DNNL_NON_X64_ONLY(REG_SR(f32, goihw, bf16, gOIhw8i16o2i, fmt_order::keep)) |
39 | DNNL_NON_X64_ONLY(REG_SR(f32, oihw, bf16, OIhw8o16i2o, fmt_order::keep)) |
40 | DNNL_NON_X64_ONLY(REG_SR(f32, goihw, bf16, gOIhw8o16i2o, fmt_order::keep)) |
41 | DNNL_NON_X64_ONLY(REG_SR(f32, oihw, bf16, IOhw8o16i2o, fmt_order::keep)) |
42 | DNNL_NON_X64_ONLY(REG_SR(f32, goihw, bf16, gIOhw8o16i2o, fmt_order::keep)) |
43 | DNNL_NON_X64_ONLY(REG_SR(f32, oihw, bf16, OIhw16i16o, fmt_order::keep)) |
44 | DNNL_NON_X64_ONLY(REG_SR(f32, goihw, bf16, gOIhw16i16o, fmt_order::keep)) |
45 | |
46 | REG_SR(f32, any, bf16, any, fmt_order::any, spec::reference) |
47 | |
48 | nullptr, |
49 | }}, |
50 | }); |
51 | return the_map; |
52 | } |
53 | |
54 | // clang-format on |
55 | |
56 | } // namespace cpu |
57 | } // namespace impl |
58 | } // namespace dnnl |
59 | |