1/*******************************************************************************
2* Copyright 2020-2022 Intel Corporation
3*
4* Licensed under the Apache License, Version 2.0 (the "License");
5* you may not use this file except in compliance with the License.
6* You may obtain a copy of the License at
7*
8* http://www.apache.org/licenses/LICENSE-2.0
9*
10* Unless required by applicable law or agreed to in writing, software
11* distributed under the License is distributed on an "AS IS" BASIS,
12* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13* See the License for the specific language governing permissions and
14* limitations under the License.
15*******************************************************************************/
16
17#include "cpu/reorder/cpu_reorder.hpp"
18
19namespace dnnl {
20namespace impl {
21namespace cpu {
22
23// clang-format off
24
25const impl_list_map_t &comp_s8_s8_impl_list_map() {
26 static const impl_list_map_t the_map = REG_REORDER_P({
27 // s8 -> s8
28 {{s8, s8, 2}, {
29 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::brgemm_matmul_matrix_B_reorder_t))
30 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t))
31 DNNL_NON_X64_ONLY(REG_SR(s8, oi, s8, OI4i16o4i, fmt_order::keep, spec::conv_req_comp))
32 DNNL_NON_X64_ONLY(REG_SR(s8, io, s8, OI4i16o4i, fmt_order::keep, spec::conv_req_comp))
33 DNNL_NON_X64_ONLY(REG_SR(s8, oi, s8, OI4i32o4i, fmt_order::keep, spec::conv_req_comp))
34 DNNL_NON_X64_ONLY(REG_SR(s8, io, s8, OI4i32o4i, fmt_order::keep, spec::conv_req_comp))
35 DNNL_NON_X64_ONLY(REG_SR(s8, oi, s8, OI4i64o4i, fmt_order::keep, spec::conv_req_comp))
36 DNNL_NON_X64_ONLY(REG_SR(s8, io, s8, OI4i64o4i, fmt_order::keep, spec::conv_req_comp))
37 REG_SR(s8, ab, s8, BA16a16b4a, fmt_order::keep, spec::conv_req_comp)
38 REG_SR(s8, ab, s8, BA16a32b4a, fmt_order::keep, spec::conv_req_comp)
39 REG_SR(s8, ab, s8, BA16a48b4a, fmt_order::keep, spec::conv_req_comp)
40 REG_SR(s8, ab, s8, BA16a64b4a, fmt_order::keep, spec::conv_req_comp)
41 REG_SR(s8, ba, s8, BA16a16b4a, fmt_order::keep, spec::conv_req_comp)
42 REG_SR(s8, ba, s8, BA16a32b4a, fmt_order::keep, spec::conv_req_comp)
43 REG_SR(s8, ba, s8, BA16a48b4a, fmt_order::keep, spec::conv_req_comp)
44 REG_SR(s8, ba, s8, BA16a64b4a, fmt_order::keep, spec::conv_req_comp)
45
46 nullptr,
47 }},
48 // s8 -> s8
49 {{s8, s8, 3}, {
50 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::brgemm_matmul_matrix_B_reorder_t))
51 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t))
52 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, wio, fmt_order::keep, spec::conv_req_comp))
53 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw4i16o4i, fmt_order::keep, spec::conv_req_comp))
54 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw4i32o4i, fmt_order::keep, spec::conv_req_comp))
55 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw4i64o4i, fmt_order::keep, spec::conv_req_comp))
56 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw4i16o4i, fmt_order::keep, spec::conv_req_comp))
57 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw4i32o4i, fmt_order::keep, spec::conv_req_comp))
58 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw4i64o4i, fmt_order::keep, spec::conv_req_comp))
59 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw4i16o4i, fmt_order::keep, spec::conv_req_comp))
60 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw4i32o4i, fmt_order::keep, spec::conv_req_comp))
61 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw4i64o4i, fmt_order::keep, spec::conv_req_comp))
62 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw2i8o4i, fmt_order::keep, spec::conv_req_comp))
63 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw2i8o4i, fmt_order::keep, spec::conv_req_comp))
64 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw2i8o4i, fmt_order::keep, spec::conv_req_comp))
65 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw4o4i, fmt_order::keep, spec::conv_req_comp))
66 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw4o4i, fmt_order::keep, spec::conv_req_comp))
67 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw4o4i, fmt_order::keep, spec::conv_req_comp))
68 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, Owi16o, fmt_order::keep, spec::conv_req_comp))
69 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, Owi16o, fmt_order::keep, spec::conv_req_comp))
70 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, Owi16o, fmt_order::keep, spec::conv_req_comp))
71 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OwI16o4i, fmt_order::keep, spec::conv_req_comp))
72 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OwI16o4i, fmt_order::keep, spec::conv_req_comp))
73 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OwI16o4i, fmt_order::keep, spec::conv_req_comp))
74 DNNL_NON_X64_ONLY(REG_SR(s8, iwo, s8, OIw16i16o4i, fmt_order::keep, spec::conv_req_comp))
75 DNNL_NON_X64_ONLY(REG_SR(s8, oiw, s8, OIw16i16o4i, fmt_order::keep, spec::conv_req_comp))
76 DNNL_NON_X64_ONLY(REG_SR(s8, wio, s8, OIw16i16o4i, fmt_order::keep, spec::conv_req_comp))
77 REG_SR(s8, abc, s8, aCB16b16c4b, fmt_order::keep, spec::conv_req_comp)
78 REG_SR(s8, abc, s8, aCB16b32c4b, fmt_order::keep, spec::conv_req_comp)
79 REG_SR(s8, abc, s8, aCB16b48c4b, fmt_order::keep, spec::conv_req_comp)
80 REG_SR(s8, abc, s8, aCB16b64c4b, fmt_order::keep, spec::conv_req_comp)
81 REG_SR(s8, acb, s8, aCB16b16c4b, fmt_order::keep, spec::conv_req_comp)
82 REG_SR(s8, acb, s8, aCB16b32c4b, fmt_order::keep, spec::conv_req_comp)
83 REG_SR(s8, acb, s8, aCB16b48c4b, fmt_order::keep, spec::conv_req_comp)
84 REG_SR(s8, acb, s8, aCB16b64c4b, fmt_order::keep, spec::conv_req_comp)
85 nullptr,
86 }},
87 {{s8, s8, 4}, {
88 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t))
89 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, hwio, fmt_order::keep, spec::conv_req_comp))
90 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, wigo, fmt_order::keep, spec::conv_req_comp))
91 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOIw4i16o4i, fmt_order::keep, spec::conv_req_comp))
92 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOIw4i16o4i, fmt_order::keep, spec::conv_req_comp))
93 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOIw2i8o4i, fmt_order::keep, spec::conv_req_comp))
94 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOIw2i8o4i, fmt_order::keep, spec::conv_req_comp))
95 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOIw4o4i, fmt_order::keep, spec::conv_req_comp))
96 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOIw4o4i, fmt_order::keep, spec::conv_req_comp))
97 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
98 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
99 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
100 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
101 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
102 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
103 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
104 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
105 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
106 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
107 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
108 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
109 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw4o4i, fmt_order::keep, spec::conv_req_comp))
110 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw4o4i, fmt_order::keep, spec::conv_req_comp))
111 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw4o4i, fmt_order::keep, spec::conv_req_comp))
112 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, Goiw16g, fmt_order::keep, spec::conv_req_comp))
113 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, Goiw16g, fmt_order::keep, spec::conv_req_comp))
114 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, Goiw8g, fmt_order::keep, spec::conv_req_comp))
115 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, Goiw8g, fmt_order::keep, spec::conv_req_comp))
116 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, Goiw4g, fmt_order::keep, spec::conv_req_comp))
117 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, Goiw4g, fmt_order::keep, spec::conv_req_comp))
118 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOwi16o, fmt_order::keep, spec::conv_req_comp))
119 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOwi16o, fmt_order::keep, spec::conv_req_comp))
120 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOwI16o4i, fmt_order::keep, spec::conv_req_comp))
121 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOwI16o4i, fmt_order::keep, spec::conv_req_comp))
122 DNNL_NON_X64_ONLY(REG_SR(s8, goiw, s8, gOIw16i16o4i, fmt_order::keep, spec::conv_req_comp))
123 DNNL_NON_X64_ONLY(REG_SR(s8, wigo, s8, gOIw16i16o4i, fmt_order::keep, spec::conv_req_comp))
124 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, Owhi16o, fmt_order::keep, spec::conv_req_comp))
125 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, Owhi16o, fmt_order::keep, spec::conv_req_comp))
126 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, Owhi16o, fmt_order::keep, spec::conv_req_comp))
127 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OhwI16o4i, fmt_order::keep, spec::conv_req_comp))
128 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OhwI16o4i, fmt_order::keep, spec::conv_req_comp))
129 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OhwI16o4i, fmt_order::keep, spec::conv_req_comp))
130 DNNL_NON_X64_ONLY(REG_SR(s8, ihwo, s8, OIhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
131 DNNL_NON_X64_ONLY(REG_SR(s8, oihw, s8, OIhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
132 DNNL_NON_X64_ONLY(REG_SR(s8, hwio, s8, OIhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
133 nullptr,
134 }},
135 {{s8, s8, 5}, {
136 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t))
137 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, hwigo, fmt_order::keep, spec::conv_req_comp))
138 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, dhwio, fmt_order::keep, spec::conv_req_comp))
139 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOIhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
140 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOIhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
141 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOIhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
142 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOIhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
143 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOIhw4o4i, fmt_order::keep, spec::conv_req_comp))
144 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOIhw4o4i, fmt_order::keep, spec::conv_req_comp))
145 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
146 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
147 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
148 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
149 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
150 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
151 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
152 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw4i32o4i, fmt_order::keep, spec::conv_req_comp))
153 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw4i64o4i, fmt_order::keep, spec::conv_req_comp))
154 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
155 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
156 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
157 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw4o4i, fmt_order::keep, spec::conv_req_comp))
158 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw4o4i, fmt_order::keep, spec::conv_req_comp))
159 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw4o4i, fmt_order::keep, spec::conv_req_comp))
160 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, Goihw16g, fmt_order::keep, spec::conv_req_comp))
161 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, Goihw16g, fmt_order::keep, spec::conv_req_comp))
162 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, Goihw8g, fmt_order::keep, spec::conv_req_comp))
163 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, Goihw8g, fmt_order::keep, spec::conv_req_comp))
164 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, Goihw4g, fmt_order::keep, spec::conv_req_comp))
165 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, Goihw4g, fmt_order::keep, spec::conv_req_comp))
166 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOwhi16o, fmt_order::keep, spec::conv_req_comp))
167 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOwhi16o, fmt_order::keep, spec::conv_req_comp))
168 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOhwI16o4i, fmt_order::keep, spec::conv_req_comp))
169 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOhwI16o4i, fmt_order::keep, spec::conv_req_comp))
170 DNNL_NON_X64_ONLY(REG_SR(s8, goihw, s8, gOIhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
171 DNNL_NON_X64_ONLY(REG_SR(s8, hwigo, s8, gOIhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
172 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OdhwI16o4i, fmt_order::keep, spec::conv_req_comp))
173 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OdhwI16o4i, fmt_order::keep, spec::conv_req_comp))
174 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OdhwI16o4i, fmt_order::keep, spec::conv_req_comp))
175 DNNL_NON_X64_ONLY(REG_SR(s8, idhwo, s8, OIdhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
176 DNNL_NON_X64_ONLY(REG_SR(s8, oidhw, s8, OIdhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
177 DNNL_NON_X64_ONLY(REG_SR(s8, dhwio, s8, OIdhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
178 nullptr,
179 }},
180 {{s8, s8, 6}, {
181 DNNL_X64_ONLY(CPU_REORDER_INSTANCE(x64::jit_uni_reorder_t))
182 DNNL_NON_X64_ONLY(REG_SR(s8, any, s8, dhwigo, fmt_order::keep, spec::conv_req_comp))
183 DNNL_NON_X64_ONLY(REG_SR(s8, goidhw, s8, gOIdhw4i16o4i, fmt_order::keep, spec::conv_req_comp))
184 DNNL_NON_X64_ONLY(REG_SR(s8, goidhw, s8, gOIdhw2i8o4i, fmt_order::keep, spec::conv_req_comp))
185 DNNL_NON_X64_ONLY(REG_SR(s8, goidhw, s8, gOIdhw4o4i, fmt_order::keep, spec::conv_req_comp))
186 DNNL_NON_X64_ONLY(REG_SR(s8, goidhw, s8, gOdhwI16o4i, fmt_order::keep, spec::conv_req_comp))
187 DNNL_NON_X64_ONLY(REG_SR(s8, goidhw, s8, gOIdhw16i16o4i, fmt_order::keep, spec::conv_req_comp))
188 nullptr,
189 }},
190 });
191 return the_map;
192}
193
194// clang-format on
195
196} // namespace cpu
197} // namespace impl
198} // namespace dnnl
199