1 | /******************************************************************************* |
---|---|
2 | * Copyright 2019-2022 Intel Corporation |
3 | * Copyright 2021 Arm Ltd. and affiliates |
4 | * |
5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | * you may not use this file except in compliance with the License. |
7 | * You may obtain a copy of the License at |
8 | * |
9 | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | * |
11 | * Unless required by applicable law or agreed to in writing, software |
12 | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | * See the License for the specific language governing permissions and |
15 | * limitations under the License. |
16 | *******************************************************************************/ |
17 | |
18 | #include "cpu/cpu_engine.hpp" |
19 | |
20 | #include "cpu/matmul/gemm_bf16_matmul.hpp" |
21 | #include "cpu/matmul/gemm_f32_matmul.hpp" |
22 | #include "cpu/matmul/gemm_x8s8s32x_matmul.hpp" |
23 | #include "cpu/matmul/ref_matmul.hpp" |
24 | #include "cpu/matmul/ref_matmul_int8.hpp" |
25 | |
26 | #if DNNL_X64 |
27 | #include "cpu/x64/matmul/brgemm_matmul.hpp" |
28 | using namespace dnnl::impl::cpu::x64::matmul; |
29 | using namespace dnnl::impl::cpu::x64; |
30 | #elif DNNL_AARCH64 && DNNL_AARCH64_USE_ACL |
31 | #include "cpu/aarch64/matmul/acl_matmul.hpp" |
32 | using namespace dnnl::impl::cpu::aarch64::matmul; |
33 | using namespace dnnl::impl::cpu::aarch64; |
34 | |
35 | #endif |
36 | |
37 | namespace dnnl { |
38 | namespace impl { |
39 | namespace cpu { |
40 | |
41 | namespace { |
42 | using namespace dnnl::impl::data_type; |
43 | using namespace dnnl::impl::cpu::matmul; |
44 | |
45 | // clang-format off |
46 | constexpr impl_list_item_t impl_list[] = REG_MATMUL_P({ |
47 | CPU_INSTANCE_AARCH64_ACL(acl_matmul_t) |
48 | CPU_INSTANCE_AMX(brgemm_matmul_t<avx512_core_amx_fp16>) |
49 | CPU_INSTANCE_AMX(brgemm_matmul_t<avx512_core_amx>) |
50 | CPU_INSTANCE_AVX512(brgemm_matmul_t<avx512_core>) |
51 | CPU_INSTANCE(gemm_f32_matmul_t) |
52 | CPU_INSTANCE_AVX512(brgemm_matmul_t<avx512_core_bf16>) |
53 | CPU_INSTANCE(gemm_bf16_matmul_t<f32>) |
54 | CPU_INSTANCE(gemm_bf16_matmul_t<bf16>) |
55 | CPU_INSTANCE_AVX512(brgemm_matmul_t<avx512_core_vnni>) |
56 | CPU_INSTANCE(gemm_x8s8s32x_matmul_t) |
57 | CPU_INSTANCE_AVX512(brgemm_matmul_t<avx512_core_fp16>) |
58 | CPU_INSTANCE(ref_matmul_t) |
59 | CPU_INSTANCE(ref_matmul_int8_t) |
60 | /* eol */ |
61 | nullptr, |
62 | }); |
63 | // clang-format on |
64 | } // namespace |
65 | |
66 | const impl_list_item_t *get_matmul_impl_list(const matmul_desc_t *desc) { |
67 | UNUSED(desc); |
68 | return impl_list; |
69 | } |
70 | |
71 | } // namespace cpu |
72 | } // namespace impl |
73 | } // namespace dnnl |
74 |