1/*******************************************************************************
2* Copyright 2020 Intel Corporation
3*
4* Licensed under the Apache License, Version 2.0 (the "License");
5* you may not use this file except in compliance with the License.
6* You may obtain a copy of the License at
7*
8* http://www.apache.org/licenses/LICENSE-2.0
9*
10* Unless required by applicable law or agreed to in writing, software
11* distributed under the License is distributed on an "AS IS" BASIS,
12* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13* See the License for the specific language governing permissions and
14* limitations under the License.
15*******************************************************************************/
16
17#ifndef CPU_GEMM_X8S8S32X_CONV_ZP_SRC_PAD_COMP_HPP_
18#define CPU_GEMM_X8S8S32X_CONV_ZP_SRC_PAD_COMP_HPP_
19
20#include "common/c_types_map.hpp"
21#include "cpu/gemm_convolution_utils.hpp"
22
23namespace dnnl {
24namespace impl {
25namespace cpu {
26
27void compute_zp_src_comp_pad(const conv_gemm_conf_t &jcp,
28 int32_t *const zp_src_pad_buf, const int32_t *const zp_src,
29 const int8_t *weights, const memory_desc_wrapper &weights_md,
30 const bool with_groups);
31
32void apply_zp_src_comp_pad(const conv_gemm_conf_t &jcp, const dim_t g,
33 const dim_t d_offset, const dim_t h_offset, const dim_t w_offset,
34 const dim_t h_size, const dim_t w_size,
35 int32_t *__restrict gemm_conv_result,
36 const int32_t *__restrict zp_src_pad_buf);
37
38} // namespace cpu
39} // namespace impl
40} // namespace dnnl
41
42#endif