1/*
2 * @brief hipError_t
3 * @enum
4 * @ingroup Enumerations
5 */
6// Developer note - when updating these, update the hipErrorName and hipErrorString functions in
7// NVCC and HCC paths Also update the hipCUDAErrorTohipError function in NVCC path.
8
9// Ignoring error-code return values from hip APIs is discouraged. On C++17,
10// we can make that yield a warning
11
12/*
13 * @brief hipError_t
14 * @enum
15 * @ingroup Enumerations
16 */
17// Developer note - when updating these, update the hipErrorName and hipErrorString functions in
18// NVCC and HCC paths Also update the hipCUDAErrorTohipError function in NVCC path.
19
20#include <cstddef>
21
22typedef enum hipError_t {
23 hipSuccess = 0, ///< Successful completion.
24 hipErrorInvalidValue = 1, ///< One or more of the parameters passed to the API call is NULL
25 ///< or not in an acceptable range.
26 hipErrorOutOfMemory = 2,
27 // Deprecated
28 hipErrorMemoryAllocation = 2, ///< Memory allocation error.
29 hipErrorNotInitialized = 3,
30 // Deprecated
31 hipErrorInitializationError = 3,
32 hipErrorDeinitialized = 4,
33 hipErrorProfilerDisabled = 5,
34 hipErrorProfilerNotInitialized = 6,
35 hipErrorProfilerAlreadyStarted = 7,
36 hipErrorProfilerAlreadyStopped = 8,
37 hipErrorInvalidConfiguration = 9,
38 hipErrorInvalidPitchValue = 12,
39 hipErrorInvalidSymbol = 13,
40 hipErrorInvalidDevicePointer = 17, ///< Invalid Device Pointer
41 hipErrorInvalidMemcpyDirection = 21, ///< Invalid memory copy direction
42 hipErrorInsufficientDriver = 35,
43 hipErrorMissingConfiguration = 52,
44 hipErrorPriorLaunchFailure = 53,
45 hipErrorInvalidDeviceFunction = 98,
46 hipErrorNoDevice = 100, ///< Call to hipGetDeviceCount returned 0 devices
47 hipErrorInvalidDevice = 101, ///< DeviceID must be in range 0...#compute-devices.
48 hipErrorInvalidImage = 200,
49 hipErrorInvalidContext = 201, ///< Produced when input context is invalid.
50 hipErrorContextAlreadyCurrent = 202,
51 hipErrorMapFailed = 205,
52 // Deprecated
53 hipErrorMapBufferObjectFailed = 205, ///< Produced when the IPC memory attach failed from ROCr.
54 hipErrorUnmapFailed = 206,
55 hipErrorArrayIsMapped = 207,
56 hipErrorAlreadyMapped = 208,
57 hipErrorNoBinaryForGpu = 209,
58 hipErrorAlreadyAcquired = 210,
59 hipErrorNotMapped = 211,
60 hipErrorNotMappedAsArray = 212,
61 hipErrorNotMappedAsPointer = 213,
62 hipErrorECCNotCorrectable = 214,
63 hipErrorUnsupportedLimit = 215,
64 hipErrorContextAlreadyInUse = 216,
65 hipErrorPeerAccessUnsupported = 217,
66 hipErrorInvalidKernelFile = 218, ///< In CUDA DRV, it is CUDA_ERROR_INVALID_PTX
67 hipErrorInvalidGraphicsContext = 219,
68 hipErrorInvalidSource = 300,
69 hipErrorFileNotFound = 301,
70 hipErrorSharedObjectSymbolNotFound = 302,
71 hipErrorSharedObjectInitFailed = 303,
72 hipErrorOperatingSystem = 304,
73 hipErrorInvalidHandle = 400,
74 // Deprecated
75 hipErrorInvalidResourceHandle = 400, ///< Resource handle (hipEvent_t or hipStream_t) invalid.
76 hipErrorNotFound = 500,
77 hipErrorNotReady = 600, ///< Indicates that asynchronous operations enqueued earlier are not
78 ///< ready. This is not actually an error, but is used to distinguish
79 ///< from hipSuccess (which indicates completion). APIs that return
80 ///< this error include hipEventQuery and hipStreamQuery.
81 hipErrorIllegalAddress = 700,
82 hipErrorLaunchOutOfResources = 701, ///< Out of resources error.
83 hipErrorLaunchTimeOut = 702,
84 hipErrorPeerAccessAlreadyEnabled =
85 704, ///< Peer access was already enabled from the current device.
86 hipErrorPeerAccessNotEnabled =
87 705, ///< Peer access was never enabled from the current device.
88 hipErrorSetOnActiveProcess = 708,
89 hipErrorAssert = 710, ///< Produced when the kernel calls assert.
90 hipErrorHostMemoryAlreadyRegistered =
91 712, ///< Produced when trying to lock a page-locked memory.
92 hipErrorHostMemoryNotRegistered =
93 713, ///< Produced when trying to unlock a non-page-locked memory.
94 hipErrorLaunchFailure =
95 719, ///< An exception occurred on the device while executing a kernel.
96 hipErrorCooperativeLaunchTooLarge =
97 720, ///< This error indicates that the number of blocks launched per grid for a kernel
98 ///< that was launched via cooperative launch APIs exceeds the maximum number of
99 ///< allowed blocks for the current device
100 hipErrorNotSupported = 801, ///< Produced when the hip API is not supported/implemented
101 hipErrorUnknown = 999, //< Unknown error.
102 // HSA Runtime Error Codes start here.
103 hipErrorRuntimeMemory = 1052, ///< HSA runtime memory call returned error. Typically not seen
104 ///< in production systems.
105 hipErrorRuntimeOther = 1053, ///< HSA runtime call other than memory returned error. Typically
106 ///< not seen in production systems.
107 hipErrorTbd ///< Marker that more error codes are needed.
108} hipError_t;
109
110
111typedef struct ihipCtx_t* hipCtx_t;
112
113// Note many APIs also use integer deviceIds as an alternative to the device pointer:
114typedef int hipDevice_t;
115
116typedef enum hipDeviceP2PAttr {
117 hipDevP2PAttrPerformanceRank = 0,
118 hipDevP2PAttrAccessSupported,
119 hipDevP2PAttrNativeAtomicSupported,
120 hipDevP2PAttrHipArrayAccessSupported
121} hipDeviceP2PAttr;
122
123typedef struct ihipStream_t* hipStream_t;
124
125#define hipIpcMemLazyEnablePeerAccess 0
126
127#define HIP_IPC_HANDLE_SIZE 64
128
129typedef struct hipIpcMemHandle_st {
130 char reserved[HIP_IPC_HANDLE_SIZE];
131} hipIpcMemHandle_t;
132
133typedef struct hipIpcEventHandle_st {
134 char reserved[HIP_IPC_HANDLE_SIZE];
135} hipIpcEventHandle_t;
136
137typedef struct ihipModule_t* hipModule_t;
138
139typedef struct ihipModuleSymbol_t* hipFunction_t;
140
141typedef struct hipFuncAttributes {
142 int binaryVersion;
143 int cacheModeCA;
144 size_t constSizeBytes;
145 size_t localSizeBytes;
146 int maxDynamicSharedSizeBytes;
147 int maxThreadsPerBlock;
148 int numRegs;
149 int preferredShmemCarveout;
150 int ptxVersion;
151 size_t sharedSizeBytes;
152} hipFuncAttributes;
153
154typedef struct ihipEvent_t* hipEvent_t;
155
156/*
157 * @brief hipDeviceAttribute_t
158 * @enum
159 * @ingroup Enumerations
160 */
161typedef enum hipDeviceAttribute_t {
162 hipDeviceAttributeMaxThreadsPerBlock, ///< Maximum number of threads per block.
163 hipDeviceAttributeMaxBlockDimX, ///< Maximum x-dimension of a block.
164 hipDeviceAttributeMaxBlockDimY, ///< Maximum y-dimension of a block.
165 hipDeviceAttributeMaxBlockDimZ, ///< Maximum z-dimension of a block.
166 hipDeviceAttributeMaxGridDimX, ///< Maximum x-dimension of a grid.
167 hipDeviceAttributeMaxGridDimY, ///< Maximum y-dimension of a grid.
168 hipDeviceAttributeMaxGridDimZ, ///< Maximum z-dimension of a grid.
169 hipDeviceAttributeMaxSharedMemoryPerBlock, ///< Maximum shared memory available per block in
170 ///< bytes.
171 hipDeviceAttributeTotalConstantMemory, ///< Constant memory size in bytes.
172 hipDeviceAttributeWarpSize, ///< Warp size in threads.
173 hipDeviceAttributeMaxRegistersPerBlock, ///< Maximum number of 32-bit registers available to a
174 ///< thread block. This number is shared by all thread
175 ///< blocks simultaneously resident on a
176 ///< multiprocessor.
177 hipDeviceAttributeClockRate, ///< Peak clock frequency in kilohertz.
178 hipDeviceAttributeMemoryClockRate, ///< Peak memory clock frequency in kilohertz.
179 hipDeviceAttributeMemoryBusWidth, ///< Global memory bus width in bits.
180 hipDeviceAttributeMultiprocessorCount, ///< Number of multiprocessors on the device.
181 hipDeviceAttributeComputeMode, ///< Compute mode that device is currently in.
182 hipDeviceAttributeL2CacheSize, ///< Size of L2 cache in bytes. 0 if the device doesn't have L2
183 ///< cache.
184 hipDeviceAttributeMaxThreadsPerMultiProcessor, ///< Maximum resident threads per
185 ///< multiprocessor.
186 hipDeviceAttributeComputeCapabilityMajor, ///< Major compute capability version number.
187 hipDeviceAttributeComputeCapabilityMinor, ///< Minor compute capability version number.
188 hipDeviceAttributeConcurrentKernels, ///< Device can possibly execute multiple kernels
189 ///< concurrently.
190 hipDeviceAttributePciBusId, ///< PCI Bus ID.
191 hipDeviceAttributePciDeviceId, ///< PCI Device ID.
192 hipDeviceAttributeMaxSharedMemoryPerMultiprocessor, ///< Maximum Shared Memory Per
193 ///< Multiprocessor.
194 hipDeviceAttributeIsMultiGpuBoard, ///< Multiple GPU devices.
195 hipDeviceAttributeIntegrated, ///< iGPU
196 hipDeviceAttributeCooperativeLaunch, ///< Support cooperative launch
197 hipDeviceAttributeCooperativeMultiDeviceLaunch, ///< Support cooperative launch on multiple devices
198 hipDeviceAttributeMaxTexture1DWidth, ///< Maximum number of elements in 1D images
199 hipDeviceAttributeMaxTexture2DWidth, ///< Maximum dimension width of 2D images in image elements
200 hipDeviceAttributeMaxTexture2DHeight, ///< Maximum dimension height of 2D images in image elements
201 hipDeviceAttributeMaxTexture3DWidth, ///< Maximum dimension width of 3D images in image elements
202 hipDeviceAttributeMaxTexture3DHeight, ///< Maximum dimensions height of 3D images in image elements
203 hipDeviceAttributeMaxTexture3DDepth, ///< Maximum dimensions depth of 3D images in image elements
204
205 hipDeviceAttributeHdpMemFlushCntl, ///< Address of the HDP_MEM_COHERENCY_FLUSH_CNTL register
206 hipDeviceAttributeHdpRegFlushCntl, ///< Address of the HDP_REG_COHERENCY_FLUSH_CNTL register
207
208 hipDeviceAttributeMaxPitch, ///< Maximum pitch in bytes allowed by memory copies
209 hipDeviceAttributeTextureAlignment, ///<Alignment requirement for textures
210 hipDeviceAttributeTexturePitchAlignment, ///<Pitch alignment requirement for 2D texture references bound to pitched memory;
211 hipDeviceAttributeKernelExecTimeout, ///<Run time limit for kernels executed on the device
212 hipDeviceAttributeCanMapHostMemory, ///<Device can map host memory into device address space
213 hipDeviceAttributeEccEnabled, ///<Device has ECC support enabled
214
215 hipDeviceAttributeCooperativeMultiDeviceUnmatchedFunc, ///< Supports cooperative launch on multiple
216 ///devices with unmatched functions
217 hipDeviceAttributeCooperativeMultiDeviceUnmatchedGridDim, ///< Supports cooperative launch on multiple
218 ///devices with unmatched grid dimensions
219 hipDeviceAttributeCooperativeMultiDeviceUnmatchedBlockDim, ///< Supports cooperative launch on multiple
220 ///devices with unmatched block dimensions
221 hipDeviceAttributeCooperativeMultiDeviceUnmatchedSharedMem, ///< Supports cooperative launch on multiple
222 ///devices with unmatched shared memories
223 hipDeviceAttributeAsicRevision, ///< Revision of the GPU in this device
224 hipDeviceAttributeManagedMemory, ///< Device supports allocating managed memory on this system
225 hipDeviceAttributeDirectManagedMemAccessFromHost, ///< Host can directly access managed memory on
226 /// the device without migration
227 hipDeviceAttributeConcurrentManagedAccess, ///< Device can coherently access managed memory
228 /// concurrently with the CPU
229 hipDeviceAttributePageableMemoryAccess, ///< Device supports coherently accessing pageable memory
230 /// without calling hipHostRegister on it
231 hipDeviceAttributePageableMemoryAccessUsesHostPageTables, ///< Device accesses pageable memory via
232 /// the host's page tables
233 hipDeviceAttributeCanUseStreamWaitValue ///< '1' if Device supports hipStreamWaitValue32() and
234 ///< hipStreamWaitValue64() , '0' otherwise.
235
236} hipDeviceAttribute_t;
237
238typedef void* hipDeviceptr_t;
239
240/*
241 * @brief hipJitOption
242 * @enum
243 * @ingroup Enumerations
244 */
245typedef enum hipJitOption {
246 hipJitOptionMaxRegisters = 0,
247 hipJitOptionThreadsPerBlock,
248 hipJitOptionWallTime,
249 hipJitOptionInfoLogBuffer,
250 hipJitOptionInfoLogBufferSizeBytes,
251 hipJitOptionErrorLogBuffer,
252 hipJitOptionErrorLogBufferSizeBytes,
253 hipJitOptionOptimizationLevel,
254 hipJitOptionTargetFromContext,
255 hipJitOptionTarget,
256 hipJitOptionFallbackStrategy,
257 hipJitOptionGenerateDebugInfo,
258 hipJitOptionLogVerbose,
259 hipJitOptionGenerateLineInfo,
260 hipJitOptionCacheMode,
261 hipJitOptionSm3xOpt,
262 hipJitOptionFastCompile,
263 hipJitOptionNumOptions
264} hipJitOption;
265
266/**
267 * @warning On AMD devices and some Nvidia devices, these hints and controls are ignored.
268 */
269typedef enum hipFuncAttribute {
270 hipFuncAttributeMaxDynamicSharedMemorySize = 8,
271 hipFuncAttributePreferredSharedMemoryCarveout = 9,
272 hipFuncAttributeMax
273} hipFuncAttribute;
274
275/**
276 * @warning On AMD devices and some Nvidia devices, these hints and controls are ignored.
277 */
278typedef enum hipFuncCache_t {
279 hipFuncCachePreferNone, ///< no preference for shared memory or L1 (default)
280 hipFuncCachePreferShared, ///< prefer larger shared memory and smaller L1 cache
281 hipFuncCachePreferL1, ///< prefer larger L1 cache and smaller shared memory
282 hipFuncCachePreferEqual, ///< prefer equal size L1 cache and shared memory
283} hipFuncCache_t;
284
285
286#define HIP_LAUNCH_PARAM_BUFFER_POINTER ((void*)0x01)
287#define HIP_LAUNCH_PARAM_BUFFER_SIZE ((void*)0x02)
288#define HIP_LAUNCH_PARAM_END ((void*)0x03)
289