1 | /* Copyright 2016 The TensorFlow Authors. All Rights Reserved. |
2 | |
3 | Licensed under the Apache License, Version 2.0 (the "License"); |
4 | you may not use this file except in compliance with the License. |
5 | You may obtain a copy of the License at |
6 | |
7 | http://www.apache.org/licenses/LICENSE-2.0 |
8 | |
9 | Unless required by applicable law or agreed to in writing, software |
10 | distributed under the License is distributed on an "AS IS" BASIS, |
11 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
12 | See the License for the specific language governing permissions and |
13 | limitations under the License. |
14 | ==============================================================================*/ |
15 | |
16 | #ifndef TENSORFLOW_CORE_PLATFORM_CPU_INFO_H_ |
17 | #define TENSORFLOW_CORE_PLATFORM_CPU_INFO_H_ |
18 | |
19 | #include <string> |
20 | |
21 | // TODO(ahentz): This is not strictly required here but, for historical |
22 | // reasons, many people depend on cpu_info.h in order to use kLittleEndian. |
23 | #include "tensorflow/core/platform/byte_order.h" |
24 | #include "tensorflow/tsl/platform/cpu_info.h" |
25 | |
26 | namespace tensorflow { |
27 | namespace port { |
28 | using tsl::port::ADX; |
29 | using tsl::port::AES; |
30 | using tsl::port::AMX_BF16; |
31 | using tsl::port::AMX_INT8; |
32 | using tsl::port::AMX_TILE; |
33 | using tsl::port::AVX; |
34 | using tsl::port::AVX2; |
35 | using tsl::port::AVX512_4FMAPS; |
36 | using tsl::port::AVX512_4VNNIW; |
37 | using tsl::port::AVX512_BF16; |
38 | using tsl::port::AVX512_VNNI; |
39 | using tsl::port::AVX512BW; |
40 | using tsl::port::AVX512CD; |
41 | using tsl::port::AVX512DQ; |
42 | using tsl::port::AVX512ER; |
43 | using tsl::port::AVX512F; |
44 | using tsl::port::AVX512IFMA; |
45 | using tsl::port::AVX512PF; |
46 | using tsl::port::AVX512VBMI; |
47 | using tsl::port::AVX512VL; |
48 | using tsl::port::AVX_VNNI; |
49 | using tsl::port::BMI1; |
50 | using tsl::port::BMI2; |
51 | using tsl::port::CMOV; |
52 | using tsl::port::CMPXCHG16B; |
53 | using tsl::port::CMPXCHG8B; |
54 | using tsl::port::CPUFamily; |
55 | using tsl::port::CPUFeature; |
56 | using tsl::port::CPUIDNumSMT; |
57 | using tsl::port::CPUModelNum; |
58 | using tsl::port::CPUVendorIDString; |
59 | using tsl::port::F16C; |
60 | using tsl::port::FMA; |
61 | using tsl::port::GetCurrentCPU; |
62 | using tsl::port::HYPERVISOR; |
63 | using tsl::port::kUnknownCPU; |
64 | using tsl::port::MaxParallelism; |
65 | using tsl::port::MMX; |
66 | using tsl::port::NominalCPUFrequency; |
67 | using tsl::port::NumHyperthreadsPerCore; |
68 | using tsl::port::NumSchedulableCPUs; |
69 | using tsl::port::NumTotalCPUs; |
70 | using tsl::port::PCLMULQDQ; |
71 | using tsl::port::POPCNT; |
72 | using tsl::port::PREFETCHW; |
73 | using tsl::port::PREFETCHWT1; |
74 | using tsl::port::RDRAND; |
75 | using tsl::port::RDSEED; |
76 | using tsl::port::SMAP; |
77 | using tsl::port::SSE; |
78 | using tsl::port::SSE2; |
79 | using tsl::port::SSE3; |
80 | using tsl::port::SSE4_1; |
81 | using tsl::port::SSE4_2; |
82 | using tsl::port::SSSE3; |
83 | using tsl::port::TestCPUFeature; |
84 | |
85 | } // namespace port |
86 | } // namespace tensorflow |
87 | |
88 | #endif // TENSORFLOW_CORE_PLATFORM_CPU_INFO_H_ |
89 | |