1 | /* Copyright 2015 The TensorFlow Authors. All Rights Reserved. |
2 | |
3 | Licensed under the Apache License, Version 2.0 (the "License"); |
4 | you may not use this file except in compliance with the License. |
5 | You may obtain a copy of the License at |
6 | |
7 | http://www.apache.org/licenses/LICENSE-2.0 |
8 | |
9 | Unless required by applicable law or agreed to in writing, software |
10 | distributed under the License is distributed on an "AS IS" BASIS, |
11 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
12 | See the License for the specific language governing permissions and |
13 | limitations under the License. |
14 | ==============================================================================*/ |
15 | |
16 | #include "tensorflow/core/kernels/cwise_ops_common.h" |
17 | |
18 | namespace tensorflow { |
19 | |
20 | REGISTER6(BinaryOp, CPU, "Div" , functor::div, float, Eigen::half, double, |
21 | bfloat16, complex64, complex128); |
22 | REGISTER8(BinaryOp, CPU, "Div" , functor::safe_div, uint8, uint16, uint32, |
23 | uint64, int8, int16, int32, int64_t); |
24 | REGISTER8(BinaryOp, CPU, "TruncateDiv" , functor::safe_div, uint8, uint16, |
25 | uint32, uint64, int8, int16, int32, int64_t); |
26 | REGISTER6(BinaryOp, CPU, "RealDiv" , functor::div, float, Eigen::half, double, |
27 | bfloat16, complex64, complex128); |
28 | REGISTER6(BinaryOp, CPU, "DivNoNan" , functor::div_no_nan, Eigen::half, float, |
29 | double, bfloat16, complex64, complex128); |
30 | |
31 | REGISTER_KERNEL_BUILDER(Name("Div" ) |
32 | .Device(DEVICE_DEFAULT) |
33 | .HostMemory("x" ) |
34 | .HostMemory("y" ) |
35 | .HostMemory("z" ) |
36 | .TypeConstraint<int32>("T" ), |
37 | BinaryOp<CPUDevice, functor::safe_div<int32>>); |
38 | |
39 | #if GOOGLE_CUDA || TENSORFLOW_USE_ROCM |
40 | #if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED) |
41 | REGISTER9(BinaryOp, GPU, "Div" , functor::div, float, Eigen::half, double, uint8, |
42 | uint16, int16, int64, complex64, complex128); |
43 | REGISTER4(BinaryOp, GPU, "TruncateDiv" , functor::div, uint8, uint16, int16, |
44 | int64); |
45 | REGISTER5(BinaryOp, GPU, "RealDiv" , functor::div, float, Eigen::half, double, |
46 | complex64, complex128); |
47 | REGISTER5(BinaryOp, GPU, "DivNoNan" , functor::div_no_nan, Eigen::half, float, |
48 | double, complex64, complex128); |
49 | #endif |
50 | |
51 | // A special GPU kernel for int32. |
52 | // TODO(b/25387198): Also enable int32 in device memory. This kernel |
53 | // registration requires all int32 inputs and outputs to be in host memory. |
54 | REGISTER_KERNEL_BUILDER(Name("Div" ) |
55 | .Device(DEVICE_GPU) |
56 | .HostMemory("x" ) |
57 | .HostMemory("y" ) |
58 | .HostMemory("z" ) |
59 | .TypeConstraint<int32>("T" ), |
60 | BinaryOp<CPUDevice, functor::safe_div<int32>>); |
61 | |
62 | #endif |
63 | |
64 | } // namespace tensorflow |
65 | |