1namespace dnnl {
2namespace impl {
3namespace gpu {
4namespace ocl {
5const char *rnn_types_header = R"==(/******************************************************************************* )==""\n"
6R"==(* Copyright 2019-2022 Intel Corporation )==""\n"
7R"==(* )==""\n"
8R"==(* Licensed under the Apache License, Version 2.0 (the "License"); )==""\n"
9R"==(* you may not use this file except in compliance with the License. )==""\n"
10R"==(* You may obtain a copy of the License at )==""\n"
11R"==(* )==""\n"
12R"==(* http: )==""\n"
13R"==(* )==""\n"
14R"==(* Unless required by applicable law or agreed to in writing, software )==""\n"
15R"==(* distributed under the License is distributed on an "AS IS" BASIS, )==""\n"
16R"==(* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. )==""\n"
17R"==(* See the License for the specific language governing permissions and )==""\n"
18R"==(* limitations under the License. )==""\n"
19R"==(*******************************************************************************/ )==""\n"
20R"==(#ifndef GPU_OCL_RNN_RNN_TYPES_H )==""\n"
21R"==(#define GPU_OCL_RNN_RNN_TYPES_H )==""\n"
22R"==(#include "gpu/ocl/ocl_types.h" )==""\n"
23R"==(#if OUTPUT_DT_U8 )==""\n"
24R"==(#define TO_OUTPUT(x) convert_uchar_sat_rte(x) )==""\n"
25R"==(#elif OUTPUT_DT_S8 )==""\n"
26R"==(#define TO_OUTPUT(x) convert_char_sat_rte(x) )==""\n"
27R"==(#elif OUTPUT_DT_S32 )==""\n"
28R"==(#define TO_OUTPUT(x) convert_int_sat_rte(x) )==""\n"
29R"==(#else )==""\n"
30R"==(#define TO_OUTPUT(x) (x) )==""\n"
31R"==(#endif )==""\n"
32R"==(#if INPUT_DT_BF16 )==""\n"
33R"==(#define TO_INPUT(x) cvt_f32_to_bf16(x) )==""\n"
34R"==(#define TO_REF(x) cvt_bf16_to_f32(x) )==""\n"
35R"==(#else )==""\n"
36R"==(#define TO_INPUT(x) (x) )==""\n"
37R"==(#define TO_REF(x) (float)(x) )==""\n"
38R"==(#endif )==""\n"
39R"==(#if DT_F16 && !IS_FWD )==""\n"
40R"==(#error "FP16 is not supported for BWD" )==""\n"
41R"==(#endif )==""\n"
42R"==(#define OFFTYPE ulong )==""\n"
43R"==(#define TO_WS_STATE(x) TO_SRC(x) )==""\n"
44R"==(#define OFF6(i0, D0, i1, D1, i2, D2, i3, D3, i4, D4, i5, D5) \ )==""\n"
45R"==(((((((i0) * (D1) + (i1)) * (D2) + (i2)) * (D3) + (i3)) * (D4) + (i4)) \ )==""\n"
46R"==(* (D5) \ )==""\n"
47R"==(+ (i5)) )==""\n"
48R"==(#define OFF5(i0, D0, i1, D1, i2, D2, i3, D3, i4, D4) \ )==""\n"
49R"==((((((i0) * (D1) + (i1)) * (D2) + (i2)) * (D3) + (i3)) * (D4) + (i4)) )==""\n"
50R"==(#define OFF4(i0, D0, i1, D1, i2, D2, i3, D3) \ )==""\n"
51R"==(((((i0) * (D1) + (i1)) * (D2) + (i2)) * (D3) + (i3)) )==""\n"
52R"==(#define OFF3(i0, D0, i1, D1, i2, D2) (((i0) * (D1) + (i1)) * (D2) + (i2)) )==""\n"
53R"==(#define OFF2(i0, D0, i1, D1) ((i0) * (D1) + (i1)) )==""\n"
54R"==(#define OFF_WS_STATE(i0, i1, i2, i3, i4) \ )==""\n"
55R"==(OFF5((i0), N_LAYER + 1, (i1), N_DIR, (i2), N_ITER + 1, (i3), BATCH, (i4), \ )==""\n"
56R"==(STATES_WS_LD) )==""\n"
57R"==(#define OFF_SCRATCH_DIFF_STATES(i0, i1, i2, i3, i4, i5) \ )==""\n"
58R"==(OFF6((i0), N_LAYER + 1, (i1), N_DIR, (i2), N_STATES + 1, (i3), N_ITER + 1, \ )==""\n"
59R"==((i4), BATCH, (i5), SCRATCH_DIFF_STATES_LD) )==""\n"
60R"==(#define OFF_WS_GATES(i0, i1, i2, i3, i4, i5) \ )==""\n"
61R"==((i0) * N_DIR *N_ITER *BATCH *GATES_WS_LD + (i1)*N_ITER *BATCH *GATES_WS_LD \ )==""\n"
62R"==(+ (i2)*BATCH *GATES_WS_LD + (i3)*GATES_WS_LD + (i4)*DHC + (i5) )==""\n"
63R"==(#define OFF_WS_GRID_OFFSET(i0, i1, i2, i3, i4) \ )==""\n"
64R"==(OFF5((i0), N_LAYER + 1, (i1), N_DIR, (i2), N_ITER + 1, (i3), BATCH, (i4), \ )==""\n"
65R"==(DHC) )==""\n"
66R"==(#if N_ITER_SCRATCH_GATES == 1 )==""\n"
67R"==(#define OFF_SCRATCH_MEM(i0, i1, i2, i3) \ )==""\n"
68R"==((i1) * SCRATCH_GATES_LD + (i2)*DHC + (i3) )==""\n"
69R"==(#else )==""\n"
70R"==(#define OFF_SCRATCH_MEM(i0, i1, i2, i3) \ )==""\n"
71R"==((i0) * BATCH *SCRATCH_GATES_LD + (i1)*SCRATCH_GATES_LD + (i2)*DHC + (i3) )==""\n"
72R"==(#endif )==""\n"
73R"==(#define OFF_WS_BIAS(i0, i1, i2, i3) \ )==""\n"
74R"==(OFF4((i0), N_LAYER, (i1), N_DIR, (i2), N_BIAS, (i3), DHC) )==""\n"
75R"==(#define CELL_WS_GATES(i3, i4, i5) OFF_WS_GATES(0, 0, 0, i3, i4, i5) )==""\n"
76R"==(#define CELL_WS_STATE(i4, i5) OFF_WS_STATE(0, 0, 0, i4, i5) )==""\n"
77R"==(#define CELL_SCRATCH_MEM(i1, i2, i3) OFF_SCRATCH_MEM(0, i1, i2, i3) )==""\n"
78R"==(#define CELL_SCRATCH_DIFF_STATES(i2, i4, i5) \ )==""\n"
79R"==(OFF_SCRATCH_DIFF_STATES(0, 0, i2, 0, i4, i5) )==""\n"
80R"==(#define CELL_WS_GRID_COMP(i3, i4) OFF_WS_GRID_OFFSET(0, 0, 0, i3, i4) )==""\n"
81R"==(#define OFF_KER_BIAS(i0, i1) OFF2((i0), N_GATES, (i1), DHC) )==""\n"
82R"==(#define OFF_SCRATCH_DHG1(i0, i1) OFF2((i0), BATCH, (i1), SCRATCH_DIFF_STATES_LD) )==""\n"
83R"==(#define OFF_SCRATCH_CELL(i0, i1) OFF2((i0), BATCH, (i1), STATES_WS_LD) )==""\n"
84R"==(#define SRC_L_OFF(x0, x1, x2) \ )==""\n"
85R"==((((x0) % SRC_L_B0) * SRC_L_SB0 + ((x0) / SRC_L_B0) * SRC_L_S0 \ )==""\n"
86R"==(+ ((x1) % SRC_L_B1) * SRC_L_SB1 + ((x1) / SRC_L_B1) * SRC_L_S1 \ )==""\n"
87R"==(+ ((x2) % SRC_L_B2) * SRC_L_SB2 + ((x2) / SRC_L_B2) * SRC_L_S2) )==""\n"
88R"==(#define SRC_I_OFF(x0, x1, x2, x3) \ )==""\n"
89R"==((((x0) % SRC_I_B0) * SRC_I_SB0 + ((x0) / SRC_I_B0) * SRC_I_S0 \ )==""\n"
90R"==(+ ((x1) % SRC_I_B1) * SRC_I_SB1 + ((x1) / SRC_I_B1) * SRC_I_S1 \ )==""\n"
91R"==(+ ((x2) % SRC_I_B2) * SRC_I_SB2 + ((x2) / SRC_I_B2) * SRC_I_S2 \ )==""\n"
92R"==(+ ((x3) % SRC_I_B3) * SRC_I_SB3 + ((x3) / SRC_I_B3) * SRC_I_S3) )==""\n"
93R"==(#define SRC_I_C_OFF(x0, x1, x2, x3) \ )==""\n"
94R"==((((x0) % SRC_I_C_B0) * SRC_I_C_SB0 + ((x0) / SRC_I_C_B0) * SRC_I_C_S0 \ )==""\n"
95R"==(+ ((x1) % SRC_I_C_B1) * SRC_I_C_SB1 \ )==""\n"
96R"==(+ ((x1) / SRC_I_C_B1) * SRC_I_C_S1 \ )==""\n"
97R"==(+ ((x2) % SRC_I_C_B2) * SRC_I_C_SB2 \ )==""\n"
98R"==(+ ((x2) / SRC_I_C_B2) * SRC_I_C_S2 \ )==""\n"
99R"==(+ ((x3) % SRC_I_C_B3) * SRC_I_C_SB3 \ )==""\n"
100R"==(+ ((x3) / SRC_I_C_B3) * SRC_I_C_S3) )==""\n"
101R"==(#define DST_L_OFF(x0, x1, x2) \ )==""\n"
102R"==((((x0) % DST_L_B0) * DST_L_SB0 + ((x0) / DST_L_B0) * DST_L_S0 \ )==""\n"
103R"==(+ ((x1) % DST_L_B1) * DST_L_SB1 + ((x1) / DST_L_B1) * DST_L_S1 \ )==""\n"
104R"==(+ ((x2) % DST_L_B2) * DST_L_SB2 + ((x2) / DST_L_B2) * DST_L_S2) )==""\n"
105R"==(#define DST_I_OFF(x0, x1, x2, x3) \ )==""\n"
106R"==((((x0) % DST_I_B0) * DST_I_SB0 + ((x0) / DST_I_B0) * DST_I_S0 \ )==""\n"
107R"==(+ ((x1) % DST_I_B1) * DST_I_SB1 + ((x1) / DST_I_B1) * DST_I_S1 \ )==""\n"
108R"==(+ ((x2) % DST_I_B2) * DST_I_SB2 + ((x2) / DST_I_B2) * DST_I_S2 \ )==""\n"
109R"==(+ ((x3) % DST_I_B3) * DST_I_SB3 + ((x3) / DST_I_B3) * DST_I_S3) )==""\n"
110R"==(#define DST_I_C_OFF(x0, x1, x2, x3) \ )==""\n"
111R"==((((x0) % DST_I_C_B0) * DST_I_C_SB0 + ((x0) / DST_I_C_B0) * DST_I_C_S0 \ )==""\n"
112R"==(+ ((x1) % DST_I_C_B1) * DST_I_C_SB1 \ )==""\n"
113R"==(+ ((x1) / DST_I_C_B1) * DST_I_C_S1 \ )==""\n"
114R"==(+ ((x2) % DST_I_C_B2) * DST_I_C_SB2 \ )==""\n"
115R"==(+ ((x2) / DST_I_C_B2) * DST_I_C_S2 \ )==""\n"
116R"==(+ ((x3) % DST_I_C_B3) * DST_I_C_SB3 \ )==""\n"
117R"==(+ ((x3) / DST_I_C_B3) * DST_I_C_S3) )==""\n"
118R"==(#define BIAS_OFF(x0, x1, x2, x3) \ )==""\n"
119R"==((((x0) % BIAS_B0) * BIAS_SB0 + ((x0) / BIAS_B0) * BIAS_S0 \ )==""\n"
120R"==(+ ((x1) % BIAS_B1) * BIAS_SB1 + ((x1) / BIAS_B1) * BIAS_S1 \ )==""\n"
121R"==(+ ((x2) % BIAS_B2) * BIAS_SB2 + ((x2) / BIAS_B2) * BIAS_S2 \ )==""\n"
122R"==(+ ((x3) % BIAS_B3) * BIAS_SB3 + ((x3) / BIAS_B3) * BIAS_S3) )==""\n"
123R"==(#define DIFF_SRC_L_OFF(x0, x1, x2) \ )==""\n"
124R"==((((x0) % DIFF_SRC_L_B0) * DIFF_SRC_L_SB0 \ )==""\n"
125R"==(+ ((x0) / DIFF_SRC_L_B0) * DIFF_SRC_L_S0 \ )==""\n"
126R"==(+ ((x1) % DIFF_SRC_L_B1) * DIFF_SRC_L_SB1 \ )==""\n"
127R"==(+ ((x1) / DIFF_SRC_L_B1) * DIFF_SRC_L_S1 \ )==""\n"
128R"==(+ ((x2) % DIFF_SRC_L_B2) * DIFF_SRC_L_SB2 \ )==""\n"
129R"==(+ ((x2) / DIFF_SRC_L_B2) * DIFF_SRC_L_S2) )==""\n"
130R"==(#define DIFF_DST_L_OFF(x0, x1, x2) \ )==""\n"
131R"==((((x0) % DIFF_DST_L_B0) * DIFF_DST_L_SB0 \ )==""\n"
132R"==(+ ((x0) / DIFF_DST_L_B0) * DIFF_DST_L_S0 \ )==""\n"
133R"==(+ ((x1) % DIFF_DST_L_B1) * DIFF_DST_L_SB1 \ )==""\n"
134R"==(+ ((x1) / DIFF_DST_L_B1) * DIFF_DST_L_S1 \ )==""\n"
135R"==(+ ((x2) % DIFF_DST_L_B2) * DIFF_DST_L_SB2 \ )==""\n"
136R"==(+ ((x2) / DIFF_DST_L_B2) * DIFF_DST_L_S2) )==""\n"
137R"==(#define DIFF_SRC_I_OFF(x0, x1, x2, x3) \ )==""\n"
138R"==((((x0) % DIFF_SRC_I_B0) * DIFF_SRC_I_SB0 \ )==""\n"
139R"==(+ ((x0) / DIFF_SRC_I_B0) * DIFF_SRC_I_S0 \ )==""\n"
140R"==(+ ((x1) % DIFF_SRC_I_B1) * DIFF_SRC_I_SB1 \ )==""\n"
141R"==(+ ((x1) / DIFF_SRC_I_B1) * DIFF_SRC_I_S1 \ )==""\n"
142R"==(+ ((x2) % DIFF_SRC_I_B2) * DIFF_SRC_I_SB2 \ )==""\n"
143R"==(+ ((x2) / DIFF_SRC_I_B2) * DIFF_SRC_I_S2 \ )==""\n"
144R"==(+ ((x3) % DIFF_SRC_I_B3) * DIFF_SRC_I_SB3 \ )==""\n"
145R"==(+ ((x3) / DIFF_SRC_I_B3) * DIFF_SRC_I_S3) )==""\n"
146R"==(#define DIFF_DST_I_OFF(x0, x1, x2, x3) \ )==""\n"
147R"==((((x0) % DIFF_DST_I_B0) * DIFF_DST_I_SB0 \ )==""\n"
148R"==(+ ((x0) / DIFF_DST_I_B0) * DIFF_DST_I_S0 \ )==""\n"
149R"==(+ ((x1) % DIFF_DST_I_B1) * DIFF_DST_I_SB1 \ )==""\n"
150R"==(+ ((x1) / DIFF_DST_I_B1) * DIFF_DST_I_S1 \ )==""\n"
151R"==(+ ((x2) % DIFF_DST_I_B2) * DIFF_DST_I_SB2 \ )==""\n"
152R"==(+ ((x2) / DIFF_DST_I_B2) * DIFF_DST_I_S2 \ )==""\n"
153R"==(+ ((x3) % DIFF_DST_I_B3) * DIFF_DST_I_SB3 \ )==""\n"
154R"==(+ ((x3) / DIFF_DST_I_B3) * DIFF_DST_I_S3) )==""\n"
155R"==(#define DIFF_SRC_I_C_OFF(x0, x1, x2, x3) \ )==""\n"
156R"==((((x0) % DIFF_SRC_I_C_B0) * DIFF_SRC_I_C_SB0 \ )==""\n"
157R"==(+ ((x0) / DIFF_SRC_I_C_B0) * DIFF_SRC_I_C_S0 \ )==""\n"
158R"==(+ ((x1) % DIFF_SRC_I_C_B1) * DIFF_SRC_I_C_SB1 \ )==""\n"
159R"==(+ ((x1) / DIFF_SRC_I_C_B1) * DIFF_SRC_I_C_S1 \ )==""\n"
160R"==(+ ((x2) % DIFF_SRC_I_C_B2) * DIFF_SRC_I_C_SB2 \ )==""\n"
161R"==(+ ((x2) / DIFF_SRC_I_C_B2) * DIFF_SRC_I_C_S2 \ )==""\n"
162R"==(+ ((x3) % DIFF_SRC_I_C_B3) * DIFF_SRC_I_C_SB3 \ )==""\n"
163R"==(+ ((x3) / DIFF_SRC_I_C_B3) * DIFF_SRC_I_C_S3) )==""\n"
164R"==(#define DIFF_DST_I_C_OFF(x0, x1, x2, x3) \ )==""\n"
165R"==((((x0) % DIFF_DST_I_C_B0) * DIFF_DST_I_C_SB0 \ )==""\n"
166R"==(+ ((x0) / DIFF_DST_I_C_B0) * DIFF_DST_I_C_S0 \ )==""\n"
167R"==(+ ((x1) % DIFF_DST_I_C_B1) * DIFF_DST_I_C_SB1 \ )==""\n"
168R"==(+ ((x1) / DIFF_DST_I_C_B1) * DIFF_DST_I_C_S1 \ )==""\n"
169R"==(+ ((x2) % DIFF_DST_I_C_B2) * DIFF_DST_I_C_SB2 \ )==""\n"
170R"==(+ ((x2) / DIFF_DST_I_C_B2) * DIFF_DST_I_C_S2 \ )==""\n"
171R"==(+ ((x3) % DIFF_DST_I_C_B3) * DIFF_DST_I_C_SB3 \ )==""\n"
172R"==(+ ((x3) / DIFF_DST_I_C_B3) * DIFF_DST_I_C_S3) )==""\n"
173R"==(#define DIFF_BIAS_OFF(x0, x1, x2, x3) \ )==""\n"
174R"==((((x0) % DIFF_BIAS_B0) * DIFF_BIAS_SB0 \ )==""\n"
175R"==(+ ((x0) / DIFF_BIAS_B0) * DIFF_BIAS_S0 \ )==""\n"
176R"==(+ ((x1) % DIFF_BIAS_B1) * DIFF_BIAS_SB1 \ )==""\n"
177R"==(+ ((x1) / DIFF_BIAS_B1) * DIFF_BIAS_S1 \ )==""\n"
178R"==(+ ((x2) % DIFF_BIAS_B2) * DIFF_BIAS_SB2 \ )==""\n"
179R"==(+ ((x2) / DIFF_BIAS_B2) * DIFF_BIAS_S2 \ )==""\n"
180R"==(+ ((x3) % DIFF_BIAS_B3) * DIFF_BIAS_SB3 \ )==""\n"
181R"==(+ ((x3) / DIFF_BIAS_B3) * DIFF_BIAS_S3) )==""\n"
182R"==(#endif )==""\n"
183R"==()==";
184}
185}
186}
187}