1namespace dnnl {
2namespace impl {
3namespace gpu {
4namespace ocl {
5const char *gen9_gemm_beta_kernel = R"==(/******************************************************************************* )==""\n"
6R"==(* Copyright 2019-2022 Intel Corporation )==""\n"
7R"==(* )==""\n"
8R"==(* Licensed under the Apache License, Version 2.0 (the "License"); )==""\n"
9R"==(* you may not use this file except in compliance with the License. )==""\n"
10R"==(* You may obtain a copy of the License at )==""\n"
11R"==(* )==""\n"
12R"==(* http: )==""\n"
13R"==(* )==""\n"
14R"==(* Unless required by applicable law or agreed to in writing, software )==""\n"
15R"==(* distributed under the License is distributed on an "AS IS" BASIS, )==""\n"
16R"==(* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. )==""\n"
17R"==(* See the License for the specific language governing permissions and )==""\n"
18R"==(* limitations under the License. )==""\n"
19R"==(*******************************************************************************/ )==""\n"
20R"==(#include "gpu/ocl/ocl_types.h" )==""\n"
21R"==(__kernel void gen9_gemm_beta(long m, long n, float alpha, )==""\n"
22R"==(__global DST_DATA_T *a, long offset, long lda) { )==""\n"
23R"==(int idy = get_group_id(1); )==""\n"
24R"==(long count = m; )==""\n"
25R"==(offset += idy * lda; )==""\n"
26R"==(if (idy < n) { )==""\n"
27R"==(while (count > 0) { )==""\n"
28R"==(a[offset] = REF_TO_DST(DST_TO_REF(a[offset]) * alpha); )==""\n"
29R"==(offset++; )==""\n"
30R"==(count--; )==""\n"
31R"==(} )==""\n"
32R"==(} )==""\n"
33R"==(} )==""\n"
34R"==()==";
35}
36}
37}
38}